B.tech or M.tech with 5+ years of experience on FE tools like Spyglass cdc and spyglass lint. Should have sound knowledge on synthesis and low power. Should have good knowledge on RTL coding and integration with excellent debug skills. Knowledge on git and CC framework will be better.
Role involves running FE tools on DSP designs and cleaning up errors , talk to lower level IPs integrate them successfully in DSP core and make DSP releases to SoC.
Mandatory Skills: Sound knowledge on RTL static checks like CDC and Lint. Have knowledge on RTL integration and compilations along with synthesis and low power design